Design-Reuse

An FPGA primer for ASIC designers

With the advent of new technologies in IC design and complexity of the business models, chip designers may want to explore different choices available to them for implementation. ASICs have been the ...
EDN

Is FPGA a simpler puzzle for ASIC designers?

Over the last 10 years, FPGA vendors have made great strides in overcoming the shortcomings of FPGAs and taking share from the ASIC market. In the late 1990s, FPGA vendors increased the capacity of ...
EDN

Running an FPGA at ASIC speed

If running your FPGA prototype at high speed is your goal, then it helps to code for the ASIC with the FPGA architecture in mind. On the other hand, if you have RTL code that mainly targets an ASIC, ...
The Next Platform

Emerging “Universal” FPGA, GPU Platform for Deep Learning

In the last couple of years, we have written and heard about the usefulness of GPUs for deep learning training as well as, to a lesser extent, custom ASICs and FPGAs. All of these options have shown ...
Design-Reuse

Structured ASICs take FPGA prototypes into volume production

Over the last few years, FPGAs have come to play an increasingly important role in the development methodology of ASICs. Programmable logic offers designers an ideal way to quickly develop prototype ...
Investopedia

What Is an ASIC Miner? How It Works and Why It Matters

Carla Tardi is a technical editor and digital content producer with 25+ years of experience at top-tier investment banks and money-management firms. Erika Rasure is globally-recognized as a leading ...
Business Wire

MathWorks Speeds FPGA and ASIC Verification with Universal Verification Methodology (UVM) Support

NATICK, Mass.--(BUSINESS WIRE)--MathWorks today announced that HDL Verifier provides support for the Universal Verification Methodology (UVM) starting with Release 2019b, which is currently available.
Circuit Digest

Vicharak’s FPGA Boards Start at 349 Rupees and Scale as You Skill Up

Backing its low-cost positioning, the board relies on a fully open-source toolchain. Also, while not official yet, Akshar ...
The Next Platform

FPGA Based Deep Learning Accelerators Take on ASICs

Over the last couple of years, the idea that the most efficient and high performance way to accelerate deep learning training and inference is with a custom ASIC—something designed to fit the specific ...
Electronic Design

Structured ASICs

So what’s a STRUCTURED ASIC? A Structured ASIC is a type of integrated circuit that contains blocks of logic, called "tiles." These tiles reside in the die ready to be connected in a customizable ...
Electronic Design

SIC Of Figuring Out The Best ASIC Solution?

Programmable ASICs—application-specific (or sporadic?) integrated circuits—bridge the gap between FPGAs and standard-cell ASICs. Ever go to a restaurant, sit down to a complex menu, and just wish you ...